關于配置暫存器和讀取ID的我都試過了，時序上沒問題，都可以配置和讀取的
void SSD2828_Init(void)
{
SSD2828_QSPI_Init();
//Packet Write Configuration
SSD2828_Write_REG(0xB8,0x0000); //VC(Virtual ChannelID) Control Register
SSD2828_Write_REG(0xB9,0x0000); //PLL Disable
//PLL Configure
//FR: bit15~14
//00 ?62.5 < OUT f < 125
//01 ?126 < OUT f < 250
//10 ?251 < OUT f < 500
//11 ?501 < OUT f < 1000
SSD2828_Write_REG(0xBA,0xC050); //Fout = Fin * 0x14 / 1 = 10M * 80 /1 = 800M
SSD2828_Write_REG(0xBB,0x0009); //LP(Low Power) Clock = Fout /10/8 = 10M
SSD2828_Write_REG(0xB9,0x0001); //PLL ENABLE
HAL_Delay(100);
//RGB Input Interface Control
SSD2828_Write_REG(0xB1,(SSD2828_VSYNC<<8)+SSD2828_HSYNC);
SSD2828_Write_REG(0xB2,(SSD2828_VBP<<8)+SSD2828_HBP);
SSD2828_Write_REG(0xB3,(SSD2828_VFP<<8)+SSD2828_HFP);
SSD2828_Write_REG(0xB4,SSD2828_WIDTH);
SSD2828_Write_REG(0xB5,SSD2828_HEIGHT);
SSD2828_Write_REG(0xB6,0x0003); //HS,VS,PCLK=0 , Bit[1:0]=11=24bpp
//Delay Timeing
//SSD2828_Write_REG(0xC4,0x0001); //Enable BTA
SSD2828_Write_REG(0xC9,0x2302); //p1: HS-Data-zero p2: HS-Data- prepare --> 8031 issue
HAL_Delay(5);
SSD2828_Write_REG(0xCA,0x2302);
SSD2828_Write_REG(0xCB,0x0510);
SSD2828_Write_REG(0xCC,0x1005); //HS CLK Trail
HAL_Delay(5);
SSD2828_Write_REG(0xD0,0x0000); //HS TX Timer=0,?????=0x0010
//MIPI Lane Configure
//00 - 1 lane mode
//01 - 2 lane mode
//10 - 3 lane mode
//11 - 4 lane mode
SSD2828_Write_REG(0xDE,0x0003); //2 Data Lane,11=4LANE 10=3LANE 01=2LANE 00=1LANE
SSD2828_Write_REG(0xD6,0x0005); //Bit[7:2]:Send X(now=1) Packet in Blanking Period, Bit[0]:1=R.G.B/0=B.G.R
SSD2828_Write_REG(0xB7,0x024B); //0x024B選擇TX_CLK作為MIPI時鐘,0x026B選擇RGB的PCLK作為MIPI時鐘
HAL_Delay(100);
}
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標籤：C語言