有沒有大佬來幫我看一下，萬分感謝：
我寫的是一個JK觸發器出現了這個錯誤Error: Port "e" does not exist in primitive "nand3" of instance "u0"
真的實在是不知道怎么，望有大佬出手相助
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY jk IS
PORT(j,k,clk:IN STD_LOGIC;
q,nq:OUT STD_LOGIC);
END jk;
ARCHITECTURE struct OF jk IS
COMPONENT nand2
PORT(a,b:IN STD_LOGIC;
f:OUT STD_LOGIC);
END COMPONENT nand2;
COMPONENT nand3
PORT(in1,in2,in3:IN STD_LOGIC;
e:out STD_LOGIC);
END COMPONENT;
SIGNAL x:STD_LOGIC_VECTOR(0 TO 3);
BEGIN
u0:nand3 PORT MAP(k,clk,x(3),x(0));
u1:nand3 PORT MAP(j,clk,x(2),x(1));
u2:nand2 PORT MAP(x(0),x(3),x(2));
u3:nand2 PORT MAP(x(2),x(1),x(3));
q<=x(3);
nq<=x(2);
END struct;
底層檔案
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY nand3 IS
PORT(in1,in2,in3:IN STD_LOGIC;
e:out STD_LOGIC);
END nand3;
ARCHITECTURE behave OF nand3 IS
BEGIN
e<=not(in1 and in2 and in3);
END behave;
-----------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY nand2 IS
PORT(a,b:IN STD_LOGIC;
f:OUT STD_LOGIC);
END nand2;
ARCHITECTURE behave OF nand2 IS
BEGIN
f<=a nand b;
END behave;
uj5u.com熱心網友回復：
不是很懂VHDL 是不是out小寫了 識別不出來uj5u.com熱心網友回復：
此nand3非彼nand3，重命名試一下轉載請註明出處，本文鏈接：https://www.uj5u.com/qita/12385.html
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